Hardware-software co-design approach for implementing reconfigurable convolutional neural networks on hybrid FPGA platforms
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Convolutional Neural Network has become a technology that is widely used in the industry to extract semantic content from images and videos. The current trend of edge computing and development of the Internet of Things requires certain adjustments to be made in the platforms and methodologies to utilize CNN models. The requirements are low power consumption, edge computation, and efficient resource utilization. Programmable system-on-chips are well-balanced platforms offering reconfigurability and energy efficiency. However, there is a gap between creating of software model and mapping it on hardware. The mapping of CNN onto the hardware platform demands a certain level of expertise in a hardware description language. Thus, this project proposes the hardware architecture that can be reconfigured to map the software CNN model on the programmable system-on-chips. Keywords: convolutional neural network; FPGA; reconfigurable computing.

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